For the replacement of conventional harddisks by NAND EEPROMs, a very high density and a high programming speed are required. An increased density can be achieved by using multi-level memory cells. With the new method, using staircase programming pulses combined with a bit-by-bit verify, a very narrow threshold voltage distribution of 0.7V, necessary for 4-level or 2-bit operation, and a high programming speed of 300μs/page or 590ns/byte can be obtained.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|Publication status||Published - 1995 Dec 1|
|Event||Proceedings of the 1995 Symposium on VLSI Technology - Kyoto, Jpn|
Duration: 1995 Jun 6 → 1995 Jun 8
ASJC Scopus subject areas
- Electrical and Electronic Engineering