Fabrication of SrTiO3 field effect transistors with SrTiO 3-δ source and drain electrodes

Taisuke Sato, Keisuke Shibuya, Tsuyoshi Ohnishi, Kazunori Nishio, Mikk Lippmaa

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    19 Citations (Scopus)


    We have developed a process for fabricating top-gate SrTiO3 field-effect transistors (FETs) where the critical channel interface is constructed before forming the source and drain electrodes in order to reduce the density of defects in the transistor channel. Metallic source and drain electrodes are formed by Argon ion milling, which is an efficient way of introducing oxygen vacancies into a thin surface layer of SrTiO3. These vacancies function as donors, inducing metallic conductivity in the electrode regions. This technique can be used to obtain clean interfaces, suppress the formation of lattice imperfections, and avoid impurities in the FET channel because the electronically active interface is constructed at an early step of the device fabrication process. Metallic conductivity of the SrTiO 3-δ source and drain electrodes was maintained even after annealing the device at up to 600°C. Contact with the transistor channel remained ohmic at least down to 50 K.

    Original languageEnglish
    JournalJapanese Journal of Applied Physics, Part 2: Letters
    Issue number20-24
    Publication statusPublished - 2007 Jun 15


    • Argon ion milling
    • CaHfO
    • Field-effect transistor
    • Hafnate
    • Oxide electronics
    • Oxygen deficient SrTiO
    • SrTiO
    • Wide-gap insulator

    ASJC Scopus subject areas

    • Engineering(all)
    • Physics and Astronomy (miscellaneous)
    • Physics and Astronomy(all)

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