Fabrication of SB-MOSFETs on SOI substrate using Ni silicide containing Er interlayer

W. Hosoda, K. Ozawa, K. Kakushima, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

SB-MOSFETs were fabricated on SOI substrates by applying novel Schottky barrier height modulation technique of Er interlayer insertion at the interface of Ni/Si prior to Ni silicidation process. It was found that Er interlayer insertion lowered Schottky barrier height for electrons while no significant increase of the resistivity in the Er interlayer inserted films compare to pure Ni suicide films in the annealing temperature range of 500-750°C. Effects of Er insertion to the transistor characteristics of SOI SB-MOSFETs are also discussed.

Original languageEnglish
Title of host publicationChina Semiconductor Technology International Conference 2010, CSTIC 2010
Pages1105-1110
Number of pages6
Edition1
DOIs
Publication statusPublished - 2010
Externally publishedYes
EventChina Semiconductor Technology International Conference 2010, CSTIC 2010 - Shanghai, China
Duration: 2010 Mar 182010 Mar 19

Publication series

NameECS Transactions
Number1
Volume27
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherChina Semiconductor Technology International Conference 2010, CSTIC 2010
CountryChina
CityShanghai
Period10/3/1810/3/19

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'Fabrication of SB-MOSFETs on SOI substrate using Ni silicide containing Er interlayer'. Together they form a unique fingerprint.

Cite this