Double-gate thin-film SOI MOSFETs have been developed for high-speed CMOS-ULSI. The important processes include planarization of the bonded surface by CVD SiO2 polishing, and low-temperature wafer bonding using BPSG film. The characteristics of the device are dramatically improved by using a double-gate structure with a 50 nm-thick Si layer. The drain current of a double-gate n-MOSFET is 3 times higher than that of a single-gate n-MOSFET. The maximum transconductance is 150 mS/mm, more than twice that of a single-gate n-MOSFET.
|Number of pages||3|
|Publication status||Published - 1991 Jan 1|
|Event||23rd International Conference on Solid State Devices and Materials - SSDM '91 - Yokohama, Jpn|
Duration: 1991 Aug 27 → 1991 Aug 29
|Other||23rd International Conference on Solid State Devices and Materials - SSDM '91|
|Period||91/8/27 → 91/8/29|
ASJC Scopus subject areas