Fabrication of a sii-ægeæ channel metal-oxide-semiconductor field-effect transistor (Mosfet) containing high ge fraction layer by low-pressure chemical vapor deposition

Kinya Goto, Junichi Murota, Takahiro Maeda, Reiner Schütz, Kiyohito Aizawa, Roland Kircher, Kuniyoshi Yokoo, Shoichi Ono

Research output: Contribution to journalArticlepeer-review

53 Citations (Scopus)

Abstract

A method for growing the high-quality strained epitaxial heterostructure of Si/Sii-^Ge^/Si by low-pressure chemical vapor deposition (CVD) and the fabrication of Sii-aGe^-channel metal-oxide-semiconductor field-effect transistors (MOSFET’s) with a high Ge fraction layer have been investigated. It is found that lowering of the deposition temperature of the Sii-xGeæ and Si capping layers is necessary with increasing Ge fraction in order to prevent island growth of the layers. With the use of the optimized fabrication process, Si/Sii-xGeæ/Si heterostructures with flat surfaces and interfaces were realized, and a high-performance Sio.sGeo.s-channel MOSFET has been achieved with a large mobility enhancement of about 70% at 300 K and over 150% at 77 K compared with that of a MOSFET without a Sii-sGe^ channel.

Original languageEnglish
Pages (from-to)438-441
Number of pages4
JournalJapanese journal of applied physics
Volume32
Issue number1 S
DOIs
Publication statusPublished - 1993 Jan

Keywords

  • CVD
  • GeH4
  • MOSFET
  • Quantum well
  • Si
  • Si1_xGex/heterostructure
  • SiH4

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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