Abstract
A method for growing the high quality strained epitaxial heterostructure as well as the fabrication of Si1-xGex-channel pMOSFET containing a high Ge fraction layer have been investigated. It is found that lowering deposition temperature of the Si1-xGex and Si capping layers is necessary with increasing Ge fraction in order to prevent an island growth of the heterostructure. Using optimized Si/Si1-xGex/Si heterostructures with flat surfaces and interfaces, high performance Si0.5Ge0.5-channel pMOSFET has been achieved with the large mobility enhancement of about 70% at 300K and over 150% at 77K compared with those of MOSFET without Si1-xGex-channel.
| Original language | English |
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| Pages | 449-451 |
| Number of pages | 3 |
| Publication status | Published - 1992 Dec 1 |
| Event | Extended Abstracts of the 1992 International Conference on Solid State Devices and Materials - SSDM '92 - Tsukuba, Jpn Duration: 1992 Aug 26 → 1992 Aug 28 |
Other
| Other | Extended Abstracts of the 1992 International Conference on Solid State Devices and Materials - SSDM '92 |
|---|---|
| City | Tsukuba, Jpn |
| Period | 92/8/26 → 92/8/28 |
ASJC Scopus subject areas
- Engineering(all)
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Goto, K., Murota, J., Maeda, T., Schuetz, R., Aizawa, K., Kircher, R., Yokoo, K., & Ono, S. (1992). Fabrication of a SiGe-channel MOSFET containing high Ge fraction layer by low-pressure chemical vapor deposition. 449-451. Paper presented at Extended Abstracts of the 1992 International Conference on Solid State Devices and Materials - SSDM '92, Tsukuba, Jpn, .