Fabrication of a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions

Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Haruhiro Hasegawa, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu

Research output: Contribution to journalArticlepeer-review

225 Citations (Scopus)

Abstract

Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced interconnection delay. We have fabricated a nonvolatile full adder based on logic-in-memory architecture using magnetic tunnel junctions (MTJs) in combination with metal oxide semiconductor (MOS) transistors. Magnesium oxide (MgO) barrier MTJs are used to take advantage of their high tunnel magneto-resistance (TMR) ratio and spin-injection write capability. The MOS transistors are fabricated using a 0.18 μm complementary metal oxide semiconductor (CMOS) process. The basic operation of the full adder is confirmed.

Original languageEnglish
Pages (from-to)913011-913013
Number of pages3
JournalApplied Physics Express
Volume1
Issue number9
DOIs
Publication statusPublished - 2008 Sep 1

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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