Fabrication of 40 nm-gate MOSFETs by nano-electron beam direct writing

A nanometer electron beam lithography system has been developed and used for fabricating sub-0.1(im gate MOSFETs. The system uses a Zr/O/W thermal field emitter (TFE) and has a 5-nm- diameter beam at a current of 100 pA, and an acceleration voltage of 50 kV. A 10-nm line in PMMA resist on a thick Si substrate was demonstrated. We develop an inorganic resist, Li_xAl_1-xF, which shows a potential for high resolution lithography less than 10 run. A chemically amplified negative resist was used as a single layer mask for MOS FET gate fabrication, and showed high resolution less than 0.1 μm width. Proximity effect correction was applied to the gate lithography, resulting in excellent line width control even less than 0.1 (im. Operation of a 40-nm-poly-silicon gate NMOSFET was confirmed. :c!996TAPJ.