Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO2 hybrid bonding of SOI wafers

Masahide Goto; Naoki Nakatani; Yuki Honda; Toshihisa Watabe; Masakazu Nanba; Yoshinori Iguchi; Takuya Saraya; Masaharu Kobayashi; Eiji Higurashi; Hiroshi Toshiyoshi; Toshiro Hiramoto

doi:10.1149/09804.0167ecst

Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers

Masahide Goto, Naoki Nakatani, Yuki Honda, Toshihisa Watabe, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

We report 3-layer stacked image sensor pixel designed for pixel-parallel complementary metal-oxide-semiconductor (CMOS) image sensors. Direct bonding of silicon-on-insulator (SOI) wafers with Au electrodes embedded in a SiO₂ surface achieves high-density pixel-wise interconnection. By applying the bonding, backside electrode forming, and handle layer removing processes, we have obtained 3-layer stacked wafer without voids or separations. Measurement of prototype 3-layered pixel confirmed linear response of 16-bit digital signal output, demonstrating feasibility of multi-layer devices with functional diversification including circuits, sensors, and More-than-Moore type devices.

Original language	English
Title of host publication	PRiME 2020
Subtitle of host publication	Semiconductor Wafer Bonding: Science, Technology, and Applications 16
Editors	R. Knechtel, C. S. Tan, T. Suga, H. Baumgart, M. S. Goorsky, F. Fournel, K. D. Hobart, F. Roozeboom
Publisher	IOP Publishing Ltd.
Pages	167-171
Number of pages	5
Edition	4
ISBN (Electronic)	9781607688990
DOIs	https://doi.org/10.1149/09804.0167ecst
Publication status	Published - 2020
Externally published	Yes
Event	Pacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200 - Honolulu, United States Duration: 2020 Oct 4 → 2020 Oct 9

Publication series

Name	ECS Transactions
Number	4
Volume	98
ISSN (Print)	1938-6737
ISSN (Electronic)	1938-5862

Conference

Conference	Pacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200
Country/Territory	United States
City	Honolulu
Period	20/10/4 → 20/10/9

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1149/09804.0167ecst

Cite this

Goto, M., Nakatani, N., Honda, Y., Watabe, T., Nanba, M., Iguchi, Y., Saraya, T., Kobayashi, M., Higurashi, E., Toshiyoshi, H., & Hiramoto, T. (2020). Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers. In R. Knechtel, C. S. Tan, T. Suga, H. Baumgart, M. S. Goorsky, F. Fournel, K. D. Hobart, & F. Roozeboom (Eds.), PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16 (4 ed., pp. 167-171). (ECS Transactions; Vol. 98, No. 4). IOP Publishing Ltd.. https://doi.org/10.1149/09804.0167ecst

Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers. / Goto, Masahide; Nakatani, Naoki; Honda, Yuki et al.

PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16. ed. / R. Knechtel; C. S. Tan; T. Suga; H. Baumgart; M. S. Goorsky; F. Fournel; K. D. Hobart; F. Roozeboom. 4. ed. IOP Publishing Ltd., 2020. p. 167-171 (ECS Transactions; Vol. 98, No. 4).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Goto, M, Nakatani, N, Honda, Y, Watabe, T, Nanba, M, Iguchi, Y, Saraya, T, Kobayashi, M, Higurashi, E, Toshiyoshi, H & Hiramoto, T 2020, Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers. in R Knechtel, CS Tan, T Suga, H Baumgart, MS Goorsky, F Fournel, KD Hobart & F Roozeboom (eds), PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16. 4 edn, ECS Transactions, no. 4, vol. 98, IOP Publishing Ltd., pp. 167-171, Pacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200, Honolulu, United States, 20/10/4. https://doi.org/10.1149/09804.0167ecst

Goto M, Nakatani N, Honda Y, Watabe T, Nanba M, Iguchi Y et al. Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers. In Knechtel R, Tan CS, Suga T, Baumgart H, Goorsky MS, Fournel F, Hobart KD, Roozeboom F, editors, PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16. 4 ed. IOP Publishing Ltd. 2020. p. 167-171. (ECS Transactions; 4). doi: 10.1149/09804.0167ecst

Goto, Masahide ; Nakatani, Naoki ; Honda, Yuki et al. / Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO₂ hybrid bonding of SOI wafers. PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16. editor / R. Knechtel ; C. S. Tan ; T. Suga ; H. Baumgart ; M. S. Goorsky ; F. Fournel ; K. D. Hobart ; F. Roozeboom. 4. ed. IOP Publishing Ltd., 2020. pp. 167-171 (ECS Transactions; 4).

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abstract = "We report 3-layer stacked image sensor pixel designed for pixel-parallel complementary metal-oxide-semiconductor (CMOS) image sensors. Direct bonding of silicon-on-insulator (SOI) wafers with Au electrodes embedded in a SiO2 surface achieves high-density pixel-wise interconnection. By applying the bonding, backside electrode forming, and handle layer removing processes, we have obtained 3-layer stacked wafer without voids or separations. Measurement of prototype 3-layered pixel confirmed linear response of 16-bit digital signal output, demonstrating feasibility of multi-layer devices with functional diversification including circuits, sensors, and More-than-Moore type devices.",

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