Fabrication of 0.12 μm pMOSFETs on high Ge fraction Si/Si _1-x Ge _x /Si(1 0 0) heterostructure with ultrashallow source/drain formed using B-doped SiGe CVD

High Ge fraction Si/Si _1-x Ge _x /Si heterostructures (x = 0.5) are processed into the super self-aligned ultrashallow junction electrode (S ³ E) pMOSFETs. The ultrashallow junction is made from the selective epitaxial B-doped Si _0.5 Ge _0.5 on source/drain grown by chemical vapor deposition (CVD) and subsequent thermal diffusion of B from B-Si _0.5 Ge _0.5 into the substrate. The Ge fraction in the S ³ EMOSFETs' buried layer changes to 0.35 after the B diffusion at 750°C due to the interdiffusion between Si and Ge. The B diffusion depth in Si/SiGe/Si is shallower compared to that in Si. Compared to Si-channel S ³ EMOSFET, the maximum linear transconductance of the 0.12μm gate Si _0.65 Ge _0.35 -channel S ³ EMOSFET increases by approximately 45%. The threshold voltage shift and the S factor degradation in the short channel region are well suppressed compared to the Si-channel S ³ EMOSFETs. It is suggested that the suppression of short channel effects is caused by the ultrashallow source/drain and the valence band discontinuity at the Si _1-x Ge _x /buffer Si interface.