Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si1-xgex CVD

Junichi Murota; M. Ishii; K. Goto; M. Sakuraba; T. Matsuura; Y. Kudoh; M. Koyanagi

doi:10.1109/ESSDERC.1997.194444

Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD

Junichi Murota, M. Ishii, K. Goto, M. Sakuraba, T. Matsuura, Y. Kudoh, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Fabrication process of 0.1μm MOSFET's were developed with Super Self-aligned ultra-Shallow junction Electrode(S³EMOSFET) by utilizing in-situ impurity doped Si_1-xGe_x selective epitaxy on the source/drain regions at 550°C by CVD. Normal saturation characteristics were observed and the threshold voltage scarcely showed a shift with the gate length, which means that the short channel effect is greatly suppressed in the S³EMOSFET. Further improvements of the current drivability were performed by annealing and selective tungsten growth. The results show very high potentials of this device for an ultrasmall MOSFET, because the effective channel length is almost the same as the fabricated gate length and the source/drain junctions are extremely shallow.

Original language	English
Title of host publication	European Solid-State Device Research Conference
Editors	H. Grunbacher
Publisher	IEEE Computer Society
Pages	376-379
Number of pages	4
ISBN (Electronic)	2863322214
DOIs	https://doi.org/10.1109/ESSDERC.1997.194444
Publication status	Published - 1997 Jan 1
Event	27th European Solid-State Device Research Conference, ESSDERC 1997 - Stuttgart, Germany Duration: 1997 Sep 22 → 1997 Sep 24

Publication series

Name	European Solid-State Device Research Conference
ISSN (Print)	1930-8876

Other

Other	27th European Solid-State Device Research Conference, ESSDERC 1997
Country	Germany
City	Stuttgart
Period	97/9/22 → 97/9/24

ASJC Scopus subject areas

Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ESSDERC.1997.194444

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Murota, J., Ishii, M., Goto, K., Sakuraba, M., Matsuura, T., Kudoh, Y., & Koyanagi, M. (1997). Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD. In H. Grunbacher (Ed.), European Solid-State Device Research Conference (pp. 376-379). (European Solid-State Device Research Conference). IEEE Computer Society. https://doi.org/10.1109/ESSDERC.1997.194444

Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD. / Murota, Junichi; Ishii, M.; Goto, K.; Sakuraba, M.; Matsuura, T.; Kudoh, Y.; Koyanagi, M.

European Solid-State Device Research Conference. ed. / H. Grunbacher. IEEE Computer Society, 1997. p. 376-379 (European Solid-State Device Research Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Murota, J, Ishii, M, Goto, K, Sakuraba, M, Matsuura, T, Kudoh, Y & Koyanagi, M 1997, Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD. in H Grunbacher (ed.), European Solid-State Device Research Conference. European Solid-State Device Research Conference, IEEE Computer Society, pp. 376-379, 27th European Solid-State Device Research Conference, ESSDERC 1997, Stuttgart, Germany, 97/9/22. https://doi.org/10.1109/ESSDERC.1997.194444

Murota J, Ishii M, Goto K, Sakuraba M, Matsuura T, Kudoh Y et al. Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD. In Grunbacher H, editor, European Solid-State Device Research Conference. IEEE Computer Society. 1997. p. 376-379. (European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDERC.1997.194444

Murota, Junichi ; Ishii, M. ; Goto, K. ; Sakuraba, M. ; Matsuura, T. ; Kudoh, Y. ; Koyanagi, M. / Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si_1-xge_x CVD. European Solid-State Device Research Conference. editor / H. Grunbacher. IEEE Computer Society, 1997. pp. 376-379 (European Solid-State Device Research Conference).

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AU - Kudoh, Y.

AU - Koyanagi, M.

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AB - Fabrication process of 0.1μm MOSFET's were developed with Super Self-aligned ultra-Shallow junction Electrode(S3EMOSFET) by utilizing in-situ impurity doped Si1-xGex selective epitaxy on the source/drain regions at 550°C by CVD. Normal saturation characteristics were observed and the threshold voltage scarcely showed a shift with the gate length, which means that the short channel effect is greatly suppressed in the S3EMOSFET. Further improvements of the current drivability were performed by annealing and selective tungsten growth. The results show very high potentials of this device for an ultrasmall MOSFET, because the effective channel length is almost the same as the fabricated gate length and the source/drain junctions are extremely shallow.

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