Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si1-xgex CVD

Junichi Murota, M. Ishii, K. Goto, M. Sakuraba, T. Matsuura, Y. Kudoh, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Fabrication process of 0.1μm MOSFET's were developed with Super Self-aligned ultra-Shallow junction Electrode(S3EMOSFET) by utilizing in-situ impurity doped Si1-xGex selective epitaxy on the source/drain regions at 550°C by CVD. Normal saturation characteristics were observed and the threshold voltage scarcely showed a shift with the gate length, which means that the short channel effect is greatly suppressed in the S3EMOSFET. Further improvements of the current drivability were performed by annealing and selective tungsten growth. The results show very high potentials of this device for an ultrasmall MOSFET, because the effective channel length is almost the same as the fabricated gate length and the source/drain junctions are extremely shallow.

Original languageEnglish
Title of host publicationEuropean Solid-State Device Research Conference
EditorsH. Grunbacher
PublisherIEEE Computer Society
Pages376-379
Number of pages4
ISBN (Electronic)2863322214
DOIs
Publication statusPublished - 1997 Jan 1
Event27th European Solid-State Device Research Conference, ESSDERC 1997 - Stuttgart, Germany
Duration: 1997 Sep 221997 Sep 24

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Other

Other27th European Solid-State Device Research Conference, ESSDERC 1997
CountryGermany
CityStuttgart
Period97/9/2297/9/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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