Evolutionary design of arithmetic circuits

Takafumi Aoki, Naofumi Homma, Tatsuo Higuchi

Research output: Contribution to journalArticlepeer-review

16 Citations (Scopus)

Abstract

This paper presents a new approach to designing arithmetic circuits by using a graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG). The key idea of the proposed method is to introduce a higher level of abstraction for arithmetic algorithms, in which arithmetic circuit structures are modeled as data-flow graphs associated with specific number representation systems. The EGG system employs evolutionary operations to transform the structure of graphs directly, which makes it possible to generate the desired circuit structure efficiently. The potential capability of EGG is demonstrated through an experiment of generating constantcoefficient multipliers.

Original languageEnglish
Pages (from-to)798-805
Number of pages8
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE82-A
Issue number5
Publication statusPublished - 1999 Jan 1

Keywords

  • Arithmetic circuits
  • Circuit design
  • Computer arithmetic
  • Evolutionary computation
  • Evolvable hardware

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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