Evaluation of power SiC-MOSFET using super-higher-order scanning nonlinear dielectric microscopy: Imaging of carrier distribution and depletion layer

N. Chinone, Y. Cho, T. Nakamura

Research output: Contribution to conferencePaper

Abstract

Evaluation techniques for semiconductor devices are keys for device development with low cost and short time to market. Especially, dopant and depletion layer distribution in devices is a critical electrical property that needs to be evaluated. Super-higher-order nonlinear dielectric microscopy (SHO-SNDM) is one of the promising techniques for semiconductor device evaluation. We developed a method for imaging detailed dopant distribution and depletion layers in semiconductor devices using SHO-SNDM. As a demonstration, a cross-section of a SiC power semiconductor device was measured by this method and detailed dopant distribution and depletion layer distributions were imaged.

Original languageEnglish
Pages289-292
Number of pages4
Publication statusPublished - 2014 Jan 1
Event40th International Symposium for Testing and Failure Analysis, ISTFA 2014 - Houston, United States
Duration: 2014 Nov 92014 Nov 13

Other

Other40th International Symposium for Testing and Failure Analysis, ISTFA 2014
CountryUnited States
CityHouston
Period14/11/914/11/13

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering

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    Chinone, N., Cho, Y., & Nakamura, T. (2014). Evaluation of power SiC-MOSFET using super-higher-order scanning nonlinear dielectric microscopy: Imaging of carrier distribution and depletion layer. 289-292. Paper presented at 40th International Symposium for Testing and Failure Analysis, ISTFA 2014, Houston, United States.