Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature

T. Fukushima, E. Iwata, J. Bea, M. Murugesan, K. W. Lee, T. Tanaka, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

Chip-to-wafer bonding is a promising technology for 3D integration due to high production yield using known good dies (KGDs). However, conventional chip-to-wafer 3D integration lowers production throughput because pick-and-place chip assembly is employed. To overcome the problem, we proposed a new chip-to-wafer 3D integration using self-assembly by which many KGDs can be simultaneously, rapidly, and precisely aligned and tightly bonded on wafers. The driving force is liquid surface tension. Here, we used an aqueous solution including dilute HF. In this paper, we discuss the dependence of alignment accuracy on several parameters in self-assembly conditions. In addition, we describe mechanism on HF-assisted direct chip bonding to wafers without thermal compression.

Original languageEnglish
Title of host publicationIEEE 3D System Integration Conference 2010, 3DIC 2010
DOIs
Publication statusPublished - 2010 Dec 1
Event2nd IEEE International 3D System Integration Conference, 3DIC 2010 - Munich, Germany
Duration: 2010 Nov 162010 Nov 18

Publication series

NameIEEE 3D System Integration Conference 2010, 3DIC 2010

Other

Other2nd IEEE International 3D System Integration Conference, 3DIC 2010
CountryGermany
CityMunich
Period10/11/1610/11/18

ASJC Scopus subject areas

  • Control and Systems Engineering

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    Fukushima, T., Iwata, E., Bea, J., Murugesan, M., Lee, K. W., Tanaka, T., & Koyanagi, M. (2010). Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. In IEEE 3D System Integration Conference 2010, 3DIC 2010 [5751436] (IEEE 3D System Integration Conference 2010, 3DIC 2010). https://doi.org/10.1109/3DIC.2010.5751436