Evaluation of a self-adaptive voltage control scheme for low-power FPGAs

Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

This paper presents a fine-grain supply-voltage-control scheme for low-power FPGAs. The proposed supply-voltage-control scheme detects the critical path in real time with small overheads by exploiting features of asynchronous architectures. In an FPGA based on the proposed supply-voltage-control scheme, logic blocks on the sub-critical path are autonomously switched to a lower supply voltage to reduce the power consumption without system performance degradation. Moreover, in order to reduce the overheads of level shifters used at the power domain interface, a look-up-table without level shifters is employed. Because of the small overheads of the proposed supply-voltage-control scheme and the power domain interface, the granularity size of the power domain in the proposed FPGA is as fine as a single four-input logic block. The proposed FPGA is fabricated using the e-Shuttle 65 nm CMOS process. Correct operation of the proposed FPGA on the test chip is confirmed.

Original languageEnglish
Pages (from-to)165-175
Number of pages11
JournalJournal of Semiconductor Technology and Science
Volume10
Issue number3
DOIs
Publication statusPublished - 2010 Sep

Keywords

  • Asynchronous architecture
  • Dynamic voltage and frequency scaling
  • Multiple supply voltages
  • Reconfigurable VLSI

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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