Energy-efficient and highly-reliable nonvolatile FPGA using self-terminated power-gating scheme

Daisuke Suzuki, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An energy-efficient and highly-reliable nonvolatile FPGA using a self-terminated power-gating scheme is proposed. Since the write current is automatically cut off just after the temporal data in the flip-flop is successfully backed up in the nonvolatile device, the amount of write energy can be minimized with no write failure. Moreover, when the backup operation in a particular logic cluster is completed, power supply of the cluster is immediately turned off, which minimizes standby energy due to leakage current. In fact, the total amount of energy consumption during the backup operation is reduced by 64% in comparison with that of a conventional worst-case based approach where the long time write current pulse is used for the reliable write.

Original languageEnglish
Title of host publicationProceedings - 2016 IEEE 46th International Symposium on Multiple-Valued Logic, ISMVL 2016
PublisherIEEE Computer Society
Pages5-10
Number of pages6
ISBN (Electronic)9781467394888
DOIs
Publication statusPublished - 2016 Jul 18
Event46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016 - Sapporo, Hokkaido, Japan
Duration: 2016 May 182016 May 20

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2016-July
ISSN (Print)0195-623X

Other

Other46th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2016
CountryJapan
CitySapporo, Hokkaido
Period16/5/1816/5/20

Keywords

  • formatting
  • style
  • styling

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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