Energy-aware current-mode inter-chip link for a dependable GALS NoC platform

Hirokatsu Shirahama, Akira Mochizuki, Yuma Watanabe, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

An inter-chip communication link with high-speed and low-energy capabilities is proposed for a dependable globally-asynchronous-locally- synchronous (GALS) network-on-chip (NoC) platform. The use of a dynamic current feedback mechanism in the link makes a current driving capability high and a signal voltage swing small, which accelerates the switching speed. The power-gating technique is also applied to greatly reduce the power dissipation since the inter-chip communication links are supposed to have long idle time in the dependable GALS NoC platform. It is demonstrated that the proposed circuit with a 1cm transmission line achieves the transmission rate of 2.8Gbps while consuming 1.1uW in a 130nm CMOS technology at the power supply of 1.2V.

Original languageEnglish
Title of host publication2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1865-1868
Number of pages4
ISBN (Print)9781479934324
DOIs
Publication statusPublished - 2014 Jan 1
Event2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia
Duration: 2014 Jun 12014 Jun 5

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Country/TerritoryAustralia
CityMelbourne, VIC
Period14/6/114/6/5

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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