TY - JOUR
T1 - Embedded FeRAM macro cell for a smart card microcontroller
AU - Miwa, Tohru
AU - Yamada, Junichi
AU - Okamoto, Yuji
AU - Koike, Hiroki
AU - Toyoshima, Hideo
AU - Hada, Hiromitsu
AU - Hayashi, Yoshihiro
AU - Okizaki, Hiroaki
AU - Miyasaka, Yoichi
AU - Kunio, Takemitsu
AU - Miyamoto, Hidenobu
AU - Gomi, Hideki
AU - Kitajima, Hiroshi
PY - 1998/1/1
Y1 - 1998/1/1
N2 - This paper describes the circuit technologies and the experimental results for an embedded FeRAM macro cell for a smart card microcontroller. This macro cell employs a 256 byte 2T/2C FeRAM cell array for rewritable nonvolatile memory storage. The macro cell performs read/write operations that are fully synchronous with the microprocessor core, and its write operations are over 1000 times faster than the program operations of a conventional EEPROM macro cell. The macro cell is provided with developed offset sense amplifiers for screening out any weak cells in write endurance. With a small memory cell, as well as a small charge pumping circuit and write circuits, the FeRAM macro cell occupies only half the area of an EEPROM macro. A prototype microcontroller provided with the FeRAM macro cell is fabricated in a standard double metal layer CMOS process with added ferroelectric capacitor process steps.
AB - This paper describes the circuit technologies and the experimental results for an embedded FeRAM macro cell for a smart card microcontroller. This macro cell employs a 256 byte 2T/2C FeRAM cell array for rewritable nonvolatile memory storage. The macro cell performs read/write operations that are fully synchronous with the microprocessor core, and its write operations are over 1000 times faster than the program operations of a conventional EEPROM macro cell. The macro cell is provided with developed offset sense amplifiers for screening out any weak cells in write endurance. With a small memory cell, as well as a small charge pumping circuit and write circuits, the FeRAM macro cell occupies only half the area of an EEPROM macro. A prototype microcontroller provided with the FeRAM macro cell is fabricated in a standard double metal layer CMOS process with added ferroelectric capacitor process steps.
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M3 - Conference article
AN - SCOPUS:0031641612
SN - 0886-5930
SP - 439
EP - 442
JO - Proceedings of the Custom Integrated Circuits Conference
JF - Proceedings of the Custom Integrated Circuits Conference
T2 - Proceedings of the 1998 IEEE Custom Integrated Circuits Conference
Y2 - 11 May 1998 through 14 May 1998
ER -