Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride

Y. Pei; C. Yin; M. Nishijima; T. Kojima; H. Nohira; T. Fukushima; T. Tanaka; M. Koyanagi

doi:10.1149/1.3096423

Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride

Y. Pei, C. Yin, M. Nishijima, T. Kojima, H. Nohira, T. Fukushima, T. Tanaka, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Crystallized W-NDs dispersed in silicon nitride were prepared by self-assembled nanodot deposition (SAND) with extremely high density (1.3×10¹³/cm²) and small size (1-1.5nm), successfully. XPS results show that the high metallic states of tungsten are remained after 800°C anneal due to the surround silicon nitride. MOS memory capacitor with W-NDs floating gate and HfO₂ blocking dielectric was fabricated. A hysteresis memory window of ∼ 1.0V is observed under low sweeping gate voltage of ±5V. A maximum memory window as large as 29V was obtained with sweeping gate voltage of ±23V, suggesting that it is a good candidate for multi-bit nonvolatile memory application.

Original language	English
Title of host publication	ECS Transactions - ISTC/CSTIC 2009 (CISTC)
Pages	33-37
Number of pages	5
Edition	1 PART 1
DOIs	https://doi.org/10.1149/1.3096423
Publication status	Published - 2009 Dec 1
Event	ISTC/CSTIC 2009 (CISTC) - Shanghai, China Duration: 2009 Mar 19 → 2009 Mar 20

Publication series

Name	ECS Transactions
Number	1 PART 1
Volume	18
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	ISTC/CSTIC 2009 (CISTC)
Country	China
City	Shanghai
Period	09/3/19 → 09/3/20

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1149/1.3096423

Fingerprint Dive into the research topics of 'Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride'. Together they form a unique fingerprint.

Cite this

Pei, Y., Yin, C., Nishijima, M., Kojima, T., Nohira, H., Fukushima, T., Tanaka, T., & Koyanagi, M. (2009). Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride. In ECS Transactions - ISTC/CSTIC 2009 (CISTC) (1 PART 1 ed., pp. 33-37). (ECS Transactions; Vol. 18, No. 1 PART 1). https://doi.org/10.1149/1.3096423

Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride. / Pei, Y.; Yin, C.; Nishijima, M.; Kojima, T.; Nohira, H.; Fukushima, T.; Tanaka, T.; Koyanagi, M.

ECS Transactions - ISTC/CSTIC 2009 (CISTC). 1 PART 1. ed. 2009. p. 33-37 (ECS Transactions; Vol. 18, No. 1 PART 1).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Pei, Y, Yin, C, Nishijima, M, Kojima, T, Nohira, H, Fukushima, T , Tanaka, T & Koyanagi, M 2009, Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride. in ECS Transactions - ISTC/CSTIC 2009 (CISTC). 1 PART 1 edn, ECS Transactions, no. 1 PART 1, vol. 18, pp. 33-37, ISTC/CSTIC 2009 (CISTC), Shanghai, China, 09/3/19. https://doi.org/10.1149/1.3096423

@inproceedings{25fd15441e5c4897932bdc8150cb7eef,

title = "Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride",

abstract = "Crystallized W-NDs dispersed in silicon nitride were prepared by self-assembled nanodot deposition (SAND) with extremely high density (1.3×1013/cm2) and small size (1-1.5nm), successfully. XPS results show that the high metallic states of tungsten are remained after 800°C anneal due to the surround silicon nitride. MOS memory capacitor with W-NDs floating gate and HfO2 blocking dielectric was fabricated. A hysteresis memory window of ∼ 1.0V is observed under low sweeping gate voltage of ±5V. A maximum memory window as large as 29V was obtained with sweeping gate voltage of ±23V, suggesting that it is a good candidate for multi-bit nonvolatile memory application.",

author = "Y. Pei and C. Yin and M. Nishijima and T. Kojima and H. Nohira and T. Fukushima and T. Tanaka and M. Koyanagi",

year = "2009",

month = dec,

day = "1",

doi = "10.1149/1.3096423",

language = "English",

isbn = "9781615676460",

series = "ECS Transactions",

number = "1 PART 1",

pages = "33--37",

booktitle = "ECS Transactions - ISTC/CSTIC 2009 (CISTC)",

edition = "1 PART 1",

note = "ISTC/CSTIC 2009 (CISTC) ; Conference date: 19-03-2009 Through 20-03-2009",

}

TY - GEN

T1 - Electrical characterization of MOS memory devices with self-assembled tungsten nano-dots dispersed in silicon nitride

AU - Pei, Y.

AU - Yin, C.

AU - Nishijima, M.

AU - Kojima, T.

AU - Nohira, H.

AU - Fukushima, T.

AU - Tanaka, T.

AU - Koyanagi, M.

PY - 2009/12/1

Y1 - 2009/12/1

N2 - Crystallized W-NDs dispersed in silicon nitride were prepared by self-assembled nanodot deposition (SAND) with extremely high density (1.3×1013/cm2) and small size (1-1.5nm), successfully. XPS results show that the high metallic states of tungsten are remained after 800°C anneal due to the surround silicon nitride. MOS memory capacitor with W-NDs floating gate and HfO2 blocking dielectric was fabricated. A hysteresis memory window of ∼ 1.0V is observed under low sweeping gate voltage of ±5V. A maximum memory window as large as 29V was obtained with sweeping gate voltage of ±23V, suggesting that it is a good candidate for multi-bit nonvolatile memory application.

AB - Crystallized W-NDs dispersed in silicon nitride were prepared by self-assembled nanodot deposition (SAND) with extremely high density (1.3×1013/cm2) and small size (1-1.5nm), successfully. XPS results show that the high metallic states of tungsten are remained after 800°C anneal due to the surround silicon nitride. MOS memory capacitor with W-NDs floating gate and HfO2 blocking dielectric was fabricated. A hysteresis memory window of ∼ 1.0V is observed under low sweeping gate voltage of ±5V. A maximum memory window as large as 29V was obtained with sweeping gate voltage of ±23V, suggesting that it is a good candidate for multi-bit nonvolatile memory application.

UR - http://www.scopus.com/inward/record.url?scp=77950630918&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77950630918&partnerID=8YFLogxK

U2 - 10.1149/1.3096423

DO - 10.1149/1.3096423

M3 - Conference contribution

AN - SCOPUS:77950630918

SN - 9781615676460

T3 - ECS Transactions

SP - 33

EP - 37

BT - ECS Transactions - ISTC/CSTIC 2009 (CISTC)

T2 - ISTC/CSTIC 2009 (CISTC)

Y2 - 19 March 2009 through 20 March 2009

ER -