EFFICIENT PIPELINED DIGITAL SIGNAL PROCESSOR BASED ON NEW PULSE-TRAIN RESIDUE ARITHMETIC CIRCUITS.

Oluwole Adegbenro, Michitaka Kameyama, Tatsuo Higuchi

Research output: Contribution to journalConference articlepeer-review

1 Citation (Scopus)

Abstract

The use of the residue number system in the implementation of a flexible FIR digital filter using shift registers connected in a ring counter form to realize residue arithmetic operations is presented. A residue number multiplication scheme based on the cyclic property of a finite field is proposed and implemented using the pulse-train technique. It is shown by means of a comparison that the pulse-train approach offers a more compact structure, thus enhancing its suitability for VLSI implementation.

Original languageEnglish
Pages (from-to)1391-1394
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Publication statusPublished - 1985 Dec 1

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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