Effects of base layer thickness on reliability of CVD Si3N4 stack gate dielectrics

Koji Eriguchi, Yoshinao Harada, Masaaki Niwa

Research output: Contribution to journalArticlepeer-review

16 Citations (Scopus)

Abstract

Effects of the base layer in Si3N4/SiON stack gate dielectrics, in particular, the physical thickness of the base layer, on the dielectric reliability, MOSFET performance and process controllability are investigated. It is found that the electrical characteristics such as TDDB lifetime as well as the Si3N4 film property in Si3N4/SiON stack dielectrics with the same capacitance oxide equivalent thickness strongly depend on the SiON-base layer thickness. From the TDDB measurements for both stress polarities and from the Si3N4 stoichiometry by the X-ray photoelectron spectroscopy analysis, the optimum SiON-base layer thickness is determined to be approximately 1 nm, in order to obtain longer TDDB lifetime and surperior n-ch MOSFET performance. The obtained results are considered to attribute to the nitrogen profile in the Si3N4/SiON stack dielectrics and the strained layer thickness near SiON/Si interface.

Original languageEnglish
Pages (from-to)587-595
Number of pages9
JournalMicroelectronics Reliability
Volume41
Issue number4
DOIs
Publication statusPublished - 2001 Apr
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Safety, Risk, Reliability and Quality
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Effects of base layer thickness on reliability of CVD Si<sub>3</sub>N<sub>4</sub> stack gate dielectrics'. Together they form a unique fingerprint.

Cite this