Effect of thin Si insertion at metal gate/high-k interface on electrical characteristics of MOS device with La2O3

D. Kitayama, T. Koyanagi, K. Kakushima, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

The effect of a thin Si layer insertion at W/La2O3 interface on the electrical characteristics of MOS capacitors and transistors is investigated. A suppression in the EOT increase can be obtained with Si insertion, indicating the inhibition of diffusion of oxygen atoms into La 2O3 layer by forming an amorphous La-silicate layer at the W/La2O3 interface. In addition, positive shifts in V fb and Vth caused by Si insertion implies the formation of amorphous La-silicate layer at the top of La2O3 dielectrics reduces the positive fixed charges induced by the metal electrode. Consequently, a large improvement in mobility has been confirmed for both at peak value and at high Eeff of 1 MV/cm with Si inserted nFETs. Although a degradation trend on EOT scaling has been observed, the insertion of thin Si layer is effective in pushing the scaling limit.

Original languageEnglish
Pages (from-to)1330-1333
Number of pages4
JournalMicroelectronic Engineering
Volume88
Issue number7
DOIs
Publication statusPublished - 2011 Jul
Externally publishedYes

Keywords

  • Direct contact
  • Effective mobility
  • High-k
  • La-silicate

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

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