Dynamic-storage-based logic-in-memory circuit and its application to a fine-grain pipelined system

Hiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

A new logic-in-memory circuit is proposed for a fine-grain pipelined VLSI system. Dynamic-storage elements are distributed over a logic-circuit plane. A functional pass gate is a key component, where a linear summation and threshold function are merged compactly using charge-storage and charge-coupling effect with a DRAM-cell-based circuit structure. The use of dynamic logic based on pass-transistor network using functional pass gates makes it possible to realize any logic circuits compactly with small power dissipation. As a typical example, a 54-bit pipelined multiplier is implemented by using the proposed circuit technology. Its power dissipation and chip area are reduced to about 63 percent and 72 percent, respectively, in comparison with those of a corresponding binary CMOS implementation under 0.35-μm CMOS technology.

Original languageEnglish
Pages (from-to)288-296
Number of pages9
JournalIEICE Transactions on Electronics
VolumeE85-C
Issue number2
Publication statusPublished - 2002 Feb

Keywords

  • Functional pass gate
  • Multiplier
  • Pass-transistor network
  • Precharge-evaluate logic
  • Signed-digit adder

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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