Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage

Masanori Natsui, A. Tamakoshi, H. Honjo, T. Watanabe, T. Nasuno, Chaoliang Zhang, T. Tanigawa, H. Inoue, M. Niwa, T. Yoshiduka, Y. Noguchi, M. Yasuhira, Y. Ma, H. Shen, S. Fukami, Hideo Sato, S. Ikeda, H. Ohno, T. Endoh, T. Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We demonstrate an SOT-MRAM, a nonvolatile memory using spin-orbit-torque (SOT) devices that have a read-disturbance-free characteristic. The SOT-MRAM fabricated by a 55-nm CMOS process achieves 60-MHz write and 90-MHz read operations with 1.2-V supply voltage under a magnetic-field-free condition. The SOT-MRAM is also implemented in a dual-port configuration utilizing three-terminal structure of the device, which realizes a wide bandwidth applicable to high-speed applications.

Original languageEnglish
Title of host publication2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728199429
DOIs
Publication statusPublished - 2020 Jun
Event2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States
Duration: 2020 Jun 162020 Jun 19

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2020-June

Conference

Conference2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
CountryUnited States
CityHonolulu
Period20/6/1620/6/19

Keywords

  • dual-port
  • MRAM
  • spin-orbit-torque
  • spintronics

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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