Disturb-free three-dimensional vertical floating gate NAND with separated-sidewall control gate

Moon Sik Seo, Tetsuo Endoh

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

Recently, the three-dimensional (3D) vertical floating gate (FG) type NAND cell arrays with the sidewall control gate (SCG) structure are receiving attention to overcome the reliability issues of charge trap (CT) type 3D NAND. In order to achieve the multilevel cell (MLC) operation for lower bit cost in 3D NAND, it is important to eliminate reliability issues, such as the Vth distribution with interference and disturbance problems and Vth shift with retention issues. In this paper, we intensively investigated the disturbance problems of the 3D vertical FG type NAND cell with separatedsidewall control gate (S-SCG) structure for the reliable MLC operation. Above all, we successfully demonstrate the fully suppressed disturbance problems, such as indirect programming of the unselected cells, hot electron injection of the edge cells and direct influence to the neighboring passing cells, by using the S-SCG with 30 nm pillar size.

Original languageEnglish
Article number02BD04
JournalJapanese journal of applied physics
Volume51
Issue number2 PART 2
DOIs
Publication statusPublished - 2012 Feb 1

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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