Direct evaluation of self-heating effects in bulk and ultra-thin BOX SOI MOSFETs using four-terminal gate resistance technique

We demonstrate clear self-heating effects (SHEs) of bulk and silicon-on-insulator (SOI) MOSFETs for various SOI/buried oxide (BOX) thicknesses including ultra-thin 6 nm BOX, which was not detected by the ac conductance method, using the four-terminal gate resistance technique. We clarify that the SHE in bulk MOSFETs originates from the degradation of thermal conductivity in a heavily doped well region. The strong chip-temperature dependence of the SHE was observed only in bulk MOSFETs. As results of the chip temperature-dependent SHE of bulk devices and the SHE suppression by BOX thinning, the device temperature of ultra-thin BOX SOI MOSFETs is close to that of bulk MOSFETs at an elevated chip temperature, which suggests the thermal advantage of extremely thin BOX structures.