Development of side-channel attack standard evaluation environment

Toshihiro Katashita, Akashi Satoh, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

An experimental FPGA board SASEBO-GII has been developed as a standard platform for advanced research on side-channel attacks and countermeasures. The board is equipped with a new FPGA device, Virtex-5 LX30/50, which provides large logic capacity and dynamic partial reconfiguration. Configuration data can be transferred from a host PC to the FPGA through a USB interface without using a JTAG cable. The USB port can also supply power for operation to the board. Even with these additional functionalities, the size of SASEBO-GII is 1/3 that of the previous board, SASEBO-G. The compactness and circuit design reduce noise that disrupts side-channel analysis. In the paper, the advantages of SASEBO-GII are demonstrated through various AES implementations and CPA experiments.

Original languageEnglish
Title of host publicationECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
Pages403-408
Number of pages6
DOIs
Publication statusPublished - 2009 Dec 10
EventECCTD 2009 - European Conference on Circuit Theory and Design Conference Program - Antalya, Turkey
Duration: 2009 Aug 232009 Aug 27

Publication series

NameECCTD 2009 - European Conference on Circuit Theory and Design Conference Program

Other

OtherECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
CountryTurkey
CityAntalya
Period09/8/2309/8/27

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Development of side-channel attack standard evaluation environment'. Together they form a unique fingerprint.

Cite this