Development of self-assembled 3-D integration technology and study of microbump and TSV induced stress in thinned chip/wafer

Tetsu Tanaka; Takafumi Fukushima; Kanuku Ri; M. Murugesan; Mitsumasa Koyanagi

doi:10.1109/SOI.2010.5641471

Development of self-assembled 3-D integration technology and study of microbump and TSV induced stress in thinned chip/wafer

Tetsu Tanaka, Takafumi Fukushima, Kanuku Ri, M. Murugesan, Mitsumasa Koyanagi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	2010 IEEE International SOI Conference, SOI 2010
DOIs	https://doi.org/10.1109/SOI.2010.5641471
Publication status	Published - 2010 Dec 30
Event	2010 IEEE International Silicon on Insulator Conference, SOI 2010 - San Diego, CA, United States Duration: 2010 Oct 11 → 2010 Oct 14

Publication series

Name	Proceedings - IEEE International SOI Conference
ISSN (Print)	1078-621X

Other

Other	2010 IEEE International Silicon on Insulator Conference, SOI 2010
Country/Territory	United States
City	San Diego, CA
Period	10/10/11 → 10/10/14

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/SOI.2010.5641471

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Development of self-assembled 3-D integration technology and study of microbump and TSV induced stress in thinned chip/wafer. / Tanaka, Tetsu ; Fukushima, Takafumi; Ri, Kanuku; Murugesan, M.; Koyanagi, Mitsumasa.

2010 IEEE International SOI Conference, SOI 2010. 2010. 5641471 (Proceedings - IEEE International SOI Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Tanaka, T , Fukushima, T, Ri, K, Murugesan, M & Koyanagi, M 2010, Development of self-assembled 3-D integration technology and study of microbump and TSV induced stress in thinned chip/wafer. in 2010 IEEE International SOI Conference, SOI 2010., 5641471, Proceedings - IEEE International SOI Conference, 2010 IEEE International Silicon on Insulator Conference, SOI 2010, San Diego, CA, United States, 10/10/11. https://doi.org/10.1109/SOI.2010.5641471

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author = "Tetsu Tanaka and Takafumi Fukushima and Kanuku Ri and M. Murugesan and Mitsumasa Koyanagi",

year = "2010",

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doi = "10.1109/SOI.2010.5641471",

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AU - Tanaka, Tetsu

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AU - Murugesan, M.

AU - Koyanagi, Mitsumasa

PY - 2010/12/30

Y1 - 2010/12/30

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M3 - Conference contribution

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T3 - Proceedings - IEEE International SOI Conference

BT - 2010 IEEE International SOI Conference, SOI 2010

T2 - 2010 IEEE International Silicon on Insulator Conference, SOI 2010

Y2 - 11 October 2010 through 14 October 2010

ER -

Development of self-assembled 3-D integration technology and study of microbump and TSV induced stress in thinned chip/wafer

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Other

ASJC Scopus subject areas

Access to Document

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