Development of a three-dimensional integrated image sensor with pixel-parallel signal processing architecture

Kei Hagiwara, Masahide Goto, Yuki Honda, Masakazu Nanba, Hiroshi Ohtake, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Hiroshi Toshiyoshi, Eiji Higurashi, Toshiro Hiramoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A prototype sensor was built to demonstrate a 3D integrated CMOS image sensor that incorporates pixel-parallel signal processing architecture. FDSOI substrates with photodiodes and in-pixel ADC circuits were directly bonded after surface activation by plasma treatment. X, Y and θ alignment errors of 20 bonded samples were reduced to within ±0.7 μm, ±0.4 μm, and ±0.004°, respectively by using IR camera system. The resulting sensor successfully captured video images, thus demonstrating the feasibility of 3D integration technology and pixel-parallel architecture for future CMOS image sensors.

Original languageEnglish
Title of host publication2015 IEEE SENSORS - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479982028
Publication statusPublished - 2015 Dec 31
Externally publishedYes
Event14th IEEE SENSORS - Busan, Korea, Republic of
Duration: 2015 Nov 12015 Nov 4

Publication series

Name2015 IEEE SENSORS - Proceedings


Country/TerritoryKorea, Republic of


  • 3D integration technology
  • CMOS image sensor
  • wafer bonding

ASJC Scopus subject areas

  • Instrumentation
  • Electronic, Optical and Magnetic Materials
  • Spectroscopy
  • Electrical and Electronic Engineering


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