Development of a CAD tool for 3D-FPGAs

Naoto Miyamoto, Yohei Matsumoto, Hanpei Koike, Tadayuki Matsumura, Kenichi Osada, Yaoko Nakagawa, Tadahiro Ohmi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

This paper presents a newly developed computer-aided design (CAD) tool for 3-dimensional field programmable gate arrays (3D-FPGAs). With this tool, primary inputs/outputs (I/Os) are packed in the configurable logic blocks (CLBs) and placed all over the 3D-FPGA. Moreover, rectangular parallelepiped confinement (RPC) and A-star (A*) search algorithms are applied to perform 3D routing, which is about 9.0 times faster than the one not introducing the algorithms, without degrading the routing quality.

Original languageEnglish
Title of host publicationIEEE 3D System Integration Conference 2010, 3DIC 2010
DOIs
Publication statusPublished - 2010 Dec 1
Event2nd IEEE International 3D System Integration Conference, 3DIC 2010 - Munich, Germany
Duration: 2010 Nov 162010 Nov 18

Publication series

NameIEEE 3D System Integration Conference 2010, 3DIC 2010

Other

Other2nd IEEE International 3D System Integration Conference, 3DIC 2010
CountryGermany
CityMunich
Period10/11/1610/11/18

ASJC Scopus subject areas

  • Control and Systems Engineering

Fingerprint Dive into the research topics of 'Development of a CAD tool for 3D-FPGAs'. Together they form a unique fingerprint.

  • Cite this

    Miyamoto, N., Matsumoto, Y., Koike, H., Matsumura, T., Osada, K., Nakagawa, Y., & Ohmi, T. (2010). Development of a CAD tool for 3D-FPGAs. In IEEE 3D System Integration Conference 2010, 3DIC 2010 [5751458] (IEEE 3D System Integration Conference 2010, 3DIC 2010). https://doi.org/10.1109/3DIC.2010.5751458