Development of a bit-level compiler for massively parallel vision chips

Takashi Komuro, Shingo Kagami, Masatoshi Ishikawa, Yoshio Katayama

Research output: Contribution to conferencePaper

4 Citations (Scopus)

Abstract

An image sensor in which each pixel has a processing element is called a vision chip. The vision chip can perform real-time visual processing at a high frame rate of 1000 fps, and is expected to find application to intelligent robots and electronic devices. The vision chip has a different structure from existing processors and required special programming skills. This paper describes the development example of a vision chip compiler that enables easy programming of the vision chip.

Original languageEnglish
Pages204-209
Number of pages6
Publication statusPublished - 2005 Dec 12
Externally publishedYes
Event7th International Workshop on Computer Architecture for Machine Perception, CAMP 2005 - Palermo, Italy
Duration: 2005 Jul 42005 Jul 6

Other

Other7th International Workshop on Computer Architecture for Machine Perception, CAMP 2005
CountryItaly
CityPalermo
Period05/7/405/7/6

ASJC Scopus subject areas

  • Engineering(all)

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    Komuro, T., Kagami, S., Ishikawa, M., & Katayama, Y. (2005). Development of a bit-level compiler for massively parallel vision chips. 204-209. Paper presented at 7th International Workshop on Computer Architecture for Machine Perception, CAMP 2005, Palermo, Italy.