Design of set-valued logic networks for wave-parallel computing

Yasushi Yuminaka, Takafumi Aoki, Tatsuo Higuchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper presents a design of set-valued logic (SVL) networks to provide an essential solution to the interconnection problems in highly parallel VLSI systems. The basic concept is frequency multiplexing of logic values, which enables us to utilize the parallelism of electrical (or optical) waves for parallel processing. This wave-parallel computing concept is capable of performing several independent binary functions in parallel with a single module. The systematic synthesis of wave-parallel computing system is discussed, and the possible implementation of SVL networks is addressed.

Original languageEnglish
Title of host publicationProceedings of The International Symposium on Multiple-Valued Logic
PublisherPubl by IEEE
Pages277-282
Number of pages6
ISBN (Print)0818633506
Publication statusPublished - 1993 Jan 1
EventProceedings of the 23rd International Symposium on Multiple-Valued Logic - Sacramento, CA, USA
Duration: 1993 May 241993 May 27

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X

Other

OtherProceedings of the 23rd International Symposium on Multiple-Valued Logic
CitySacramento, CA, USA
Period93/5/2493/5/27

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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