Design of Neural Networks Based on Wave-Parallel Computing Technique

Yasushi Yuminaka, Yoshisato Sasaki, Takafumi Aoki, Tatsuo Higuchi

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively-parallel analog hardware required for implementing neural networks. The fundamental concepts are the frequency multiplexing of signals on a single line, and their wave-parallel processing without decomposition. This paper discusses the realization of a Hopfield-type massively-connected neural network, and shows that the WPC-based network exhibits much lower topological complexity compared with the original network. We also investigate the possible implementation of WPC using the present MOS technology, and discuss the performance evaluation in terms of the degree of multiplexing and the processing speed.

Original languageEnglish
Pages (from-to)315-327
Number of pages13
JournalAnalog Integrated Circuits and Signal Processing
Volume15
Issue number3
DOIs
Publication statusPublished - 1998 Jan 1

Keywords

  • Analog Implementations of Neural Networks
  • Frequency Multiplexing
  • Multiple-Valued Logic
  • Set-Valued Logic

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

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