TY - GEN
T1 - Design of majority logic gate for single-dopant device
AU - Ova, Takahide
AU - Shinada, Takahiro
N1 - Funding Information:
This work was partly supported by JSPS KAKENHI Grant Numbers 25110015, 16K14242, and 15K06011.
Publisher Copyright:
© 2017 JSAP.
Copyright:
Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2017/12/29
Y1 - 2017/12/29
N2 - This paper describes a majority logic gate circuit on a "single-dopant" device. The single-dopant device that has been receiving increasing attention in recent years is one of atomic scale solid-state device and can be a practical platform for a single-electron circuit. We here aim to fabricate actual single-dopant majority logic circuits with deterministic doping method. For this, we design a possible circuit on the device and test its operation by Monte Carlo simulation as a first step of this study. As results, we confirmed correct circuit operation and found that the device will have thermal-noise- and device-parameter-fluctuation-harnessing abilities. We believe that we will succeed to fabricate practical the single-dopant majority logic gate circuit in near future.
AB - This paper describes a majority logic gate circuit on a "single-dopant" device. The single-dopant device that has been receiving increasing attention in recent years is one of atomic scale solid-state device and can be a practical platform for a single-electron circuit. We here aim to fabricate actual single-dopant majority logic circuits with deterministic doping method. For this, we design a possible circuit on the device and test its operation by Monte Carlo simulation as a first step of this study. As results, we confirmed correct circuit operation and found that the device will have thermal-noise- and device-parameter-fluctuation-harnessing abilities. We believe that we will succeed to fabricate practical the single-dopant majority logic gate circuit in near future.
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U2 - 10.23919/SNW.2017.8242342
DO - 10.23919/SNW.2017.8242342
M3 - Conference contribution
AN - SCOPUS:85051009016
T3 - 2017 Silicon Nanoelectronics Workshop, SNW 2017
SP - 151
EP - 152
BT - 2017 Silicon Nanoelectronics Workshop, SNW 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd Silicon Nanoelectronics Workshop, SNW 2017
Y2 - 4 June 2017 through 5 June 2017
ER -