Design of frequency-mode set-valued logic networks

T. Aoki, Y. Yuminaka, T. Higuchi

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

A set-valued logic network is proposed to provide a potential solution to the interconnection problems in VLSI systems. The fundamental concept is frequency multiplexing of logic values for the increase of information density in logic networks. It is shown that the set-valued logic network can be constructed with two basic building blocks realized by frequency-selective circuits. A set-valued switching algebra is introduced for the systematic synthesis of networks. The set-valued logic network thus obtained has the attractive features of high information density, highly parallel structure and extensibility into ultra-higher-valued logic systems.

Original languageEnglish
Pages (from-to)191-198
Number of pages8
JournalIEE Proceedings, Part G: Circuits, Devices and Systems
Volume140
Issue number3
DOIs
Publication statusPublished - 1993 Jan 1

ASJC Scopus subject areas

  • Engineering(all)

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