Design of Dependent-Failure-Tolerant Microcumputer System Using Triple-Modular Redundancy

Michitaka Kameyama; Tatsuo Higuchi

doi:10.1109/TC.1980.1675545

Design of Dependent-Failure-Tolerant Microcumputer System Using Triple-Modular Redundancy

Michitaka Kameyama, Tatsuo Higuchi

INF - Computer and Mathematical Sciences

Research output: Contribution to journal › Article › peer-review

18 Citations (Scopus)

Abstract

Microcomputer system reliability using triple-modularredundancy (TMR) is discussed when failures exist not only in any single module but also in any two or three modules at a time. The optimal time interval is calculated by which the system will even be resynchronized periodically so that additional transient failures can be tolerated. It is shown that in spite of the optimal resynchronization, thereliability of the system cannot be improved by the ordinary TMR under some dependent-failures. For the purpose of eliminating the effect of dependent-failures, a new fault-tolerant microcomputer system is proposed where a program is executed three times by three CPU's.

Original language	English
Pages (from-to)	202-206
Number of pages	5
Journal	IEEE Transactions on Computers
Volume	C-29
Issue number	2
DOIs	https://doi.org/10.1109/TC.1980.1675545
Publication status	Published - 1980 Jan 1

ASJC Scopus subject areas

Software
Theoretical Computer Science
Hardware and Architecture
Computational Theory and Mathematics

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@article{19b52b32e31b40b982361cacabb2ce5f,

title = "Design of Dependent-Failure-Tolerant Microcumputer System Using Triple-Modular Redundancy",

abstract = "Microcomputer system reliability using triple-modularredundancy (TMR) is discussed when failures exist not only in any single module but also in any two or three modules at a time. The optimal time interval is calculated by which the system will even be resynchronized periodically so that additional transient failures can be tolerated. It is shown that in spite of the optimal resynchronization, thereliability of the system cannot be improved by the ordinary TMR under some dependent-failures. For the purpose of eliminating the effect of dependent-failures, a new fault-tolerant microcomputer system is proposed where a program is executed three times by three CPU's.",

author = "Michitaka Kameyama and Tatsuo Higuchi",

year = "1980",

month = jan,

day = "1",

doi = "10.1109/TC.1980.1675545",

language = "English",

volume = "C-29",

pages = "202--206",

journal = "IEEE Transactions on Computers",

issn = "0018-9340",

publisher = "IEEE Computer Society",

number = "2",

}

TY - JOUR

T1 - Design of Dependent-Failure-Tolerant Microcumputer System Using Triple-Modular Redundancy

AU - Kameyama, Michitaka

AU - Higuchi, Tatsuo

PY - 1980/1/1

Y1 - 1980/1/1

N2 - Microcomputer system reliability using triple-modularredundancy (TMR) is discussed when failures exist not only in any single module but also in any two or three modules at a time. The optimal time interval is calculated by which the system will even be resynchronized periodically so that additional transient failures can be tolerated. It is shown that in spite of the optimal resynchronization, thereliability of the system cannot be improved by the ordinary TMR under some dependent-failures. For the purpose of eliminating the effect of dependent-failures, a new fault-tolerant microcomputer system is proposed where a program is executed three times by three CPU's.

AB - Microcomputer system reliability using triple-modularredundancy (TMR) is discussed when failures exist not only in any single module but also in any two or three modules at a time. The optimal time interval is calculated by which the system will even be resynchronized periodically so that additional transient failures can be tolerated. It is shown that in spite of the optimal resynchronization, thereliability of the system cannot be improved by the ordinary TMR under some dependent-failures. For the purpose of eliminating the effect of dependent-failures, a new fault-tolerant microcomputer system is proposed where a program is executed three times by three CPU's.

UR - http://www.scopus.com/inward/record.url?scp=84939739508&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84939739508&partnerID=8YFLogxK

U2 - 10.1109/TC.1980.1675545

DO - 10.1109/TC.1980.1675545

M3 - Article

AN - SCOPUS:84939739508

VL - C-29

SP - 202

EP - 206

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 2

ER -

Design of Dependent-Failure-Tolerant Microcumputer System Using Triple-Modular Redundancy

Abstract

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