Design of a VLSI processor chip for three-dimensional instrumentation

Seunghwan Lee, Masanori Hariyama, Michitaka Kameyama

Research output: Contribution to conferencePaperpeer-review

Abstract

Three-dimensional(3-D) instrumentation based on optical flow is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation time and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel values of a row and column are stored across memory modules. Therefore, the pixel values are read in parallel from the frame memory. Based on the concurrent memory-access scheme, the performance of the processor is 2 million times faster than that of a 28.5 MIPS workstation.

Original languageEnglish
Pages951-954
Number of pages4
Publication statusPublished - 1997 Dec 1
EventProceedings of the 1997 36th SICE Annual Conference - Tokushima, Jpn
Duration: 1997 Jul 291997 Jul 31

Other

OtherProceedings of the 1997 36th SICE Annual Conference
CityTokushima, Jpn
Period97/7/2997/7/31

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Computer Science Applications
  • Electrical and Electronic Engineering

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