Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link

Akira Mochizuki; Hirokatsu Shirahama; Takahiro Hanyu

doi:10.1109/ISMVL.2014.20

Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link

Akira Mochizuki, Hirokatsu Shirahama, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

A single-ended-style current-mode circuit with quaternary current signaling is proposed for an energy-efficient asynchronous communication link. The use of quaternary-encoded current signaling and dynamic current-feedback mechanism makes information density twice per wire because of small signal-voltage swing with maintaining high-speed switching capability, which resulting in energy-efficient asynchronous data transmission. It is demonstrated that the proposed link with a 10mm inter-chip transmission line achieves the throughput of 1.1Gbps per wire at the power supply of 1.2V under a 130nm CMOS technology.

Original language	English
Title of host publication	Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014
Publisher	IEEE Computer Society
Pages	67-72
Number of pages	6
ISBN (Print)	9781479935345
DOIs	https://doi.org/10.1109/ISMVL.2014.20
Publication status	Published - 2014 Jan 1
Event	44th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2014 - Bremen, Germany Duration: 2014 May 19 → 2014 May 21

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Other

Other	44th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2014
Country	Germany
City	Bremen
Period	14/5/19 → 14/5/21

Keywords

NoC
asynchronous communication link
current-mode
multiple-valued
network on chip

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Access to Document

10.1109/ISMVL.2014.20

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Cite this

Mochizuki, A., Shirahama, H., & Hanyu, T. (2014). Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link. In Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014 (pp. 67-72). [6844998] (Proceedings of The International Symposium on Multiple-Valued Logic). IEEE Computer Society. https://doi.org/10.1109/ISMVL.2014.20

Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link. / Mochizuki, Akira; Shirahama, Hirokatsu; Hanyu, Takahiro.

Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014. IEEE Computer Society, 2014. p. 67-72 6844998 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Mochizuki, A, Shirahama, H & Hanyu, T 2014, Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link. in Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014., 6844998, Proceedings of The International Symposium on Multiple-Valued Logic, IEEE Computer Society, pp. 67-72, 44th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2014, Bremen, Germany, 14/5/19. https://doi.org/10.1109/ISMVL.2014.20

Mochizuki A, Shirahama H, Hanyu T. Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link. In Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014. IEEE Computer Society. 2014. p. 67-72. 6844998. (Proceedings of The International Symposium on Multiple-Valued Logic). https://doi.org/10.1109/ISMVL.2014.20

Mochizuki, Akira ; Shirahama, Hirokatsu ; Hanyu, Takahiro. / Design of a quaternary single-ended current-mode circuit for an energy-efficient inter-chip asynchronous communication link. Proceedings - 2014 IEEE 44th International Symposium on Multiple-Valued Logic, ISMVL 2014. IEEE Computer Society, 2014. pp. 67-72 (Proceedings of The International Symposium on Multiple-Valued Logic).

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