TY - JOUR
T1 - Design of a low-power nonvolatile flip-flop using three-terminal magnetic-tunnel-junction-based self-terminated mechanism
AU - Suzuki, Daisuke
AU - Hanyu, Takahiro
N1 - Publisher Copyright:
© 2017 The Japan Society of Applied Physics.
PY - 2017/4
Y1 - 2017/4
N2 - A nonvolatile flip-flop (NV-FF) using a three-terminal magnetic tunnel junction (3T-MTJ)-based self-terminated mechanism is proposed for a lowpower logic LSI while maintaining almost the same performance as a conventional CMOS-based logic LSI. The use of a self-terminated mechanism, which continuously monitors the change in MTJ resistance, makes it possible not only to minimize the write energy consumption for the 3T-MTJ device but also to ensure a reliable write. Moreover, since the write current path is separated from the read current path in the 3T-MTJ device, the sensing circuit and the write driver are individually optimized, which makes it possible to minimize the performance overhead due to additional components. As a result, the write energy of the proposed NV-FF is reduced by 69% with a small performance overhead compared with that of a conventional NV-FF using a worst-case-oriented writing scheme.
AB - A nonvolatile flip-flop (NV-FF) using a three-terminal magnetic tunnel junction (3T-MTJ)-based self-terminated mechanism is proposed for a lowpower logic LSI while maintaining almost the same performance as a conventional CMOS-based logic LSI. The use of a self-terminated mechanism, which continuously monitors the change in MTJ resistance, makes it possible not only to minimize the write energy consumption for the 3T-MTJ device but also to ensure a reliable write. Moreover, since the write current path is separated from the read current path in the 3T-MTJ device, the sensing circuit and the write driver are individually optimized, which makes it possible to minimize the performance overhead due to additional components. As a result, the write energy of the proposed NV-FF is reduced by 69% with a small performance overhead compared with that of a conventional NV-FF using a worst-case-oriented writing scheme.
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U2 - 10.7567/JJAP.56.04CN06
DO - 10.7567/JJAP.56.04CN06
M3 - Article
AN - SCOPUS:85017100132
VL - 56
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
SN - 0021-4922
IS - 4
M1 - 04CN06
ER -