Design of a low-power multiple-valued integrated circuit based on dynamic source-coupled logic

Akira Mochizuki, Takahiro Hanyu, Michitaka Kameyama

Research output: Contribution to journalArticlepeer-review

18 Citations (Scopus)

Abstract

A new multiple-valued current-mode integrated circuit based on dynamic source-coupled logic is proposed for a low-power arithmetic- oriented VLSI processor. A judicious combination of source-coupled logic and dynamic logic makes it possible to reduce the power dissipation while maintaining a high-speed switching capability because the dynamic logic style makes steady current flow cut off. As a typical example of a high-performance arithmetic circuit, a radix-2 signed-digit full adder based on the dynamic source-coupled logic is implemented using a 0.18μm CMOS technology. Its power dissipation is reduced to about 70 percent in comparison with that of a corresponding binary CMOS implementation.

Original languageEnglish
Pages (from-to)481-497
Number of pages17
JournalJournal of Multiple-Valued Logic and Soft Computing
Volume11
Issue number5-6
Publication statusPublished - 2005 Aug 15

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Logic

Fingerprint Dive into the research topics of 'Design of a low-power multiple-valued integrated circuit based on dynamic source-coupled logic'. Together they form a unique fingerprint.

Cite this