Design of a fine-grain reconfigurable VLSI based on logic-in-control architecture

Nobuaki Okada; Michitaka Kameyama

doi:10.1109/SOCDC.2009.5423802

Design of a fine-grain reconfigurable VLSI based on logic-in-control architecture

Nobuaki Okada, Michitaka Kameyama

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A multiple-valued reconfigurable VLSI based on logic-in-control architecture is proposed to make interconnections between arithmetic/logic circuits and control circuits simple. Hybrid programming scheme based on wired programming and dynamic data-path control programming is introduced to achieve high utilization ratio of hardware resources. In logic-in-control architecture, the control circuit constructed by using multiple logic blocks can be provided near the arithmetic/logic circuit, which leads to small propagation delay of control signals. To reduce the complexity of interconnections between logic blocks in the control circuit, only one state in a state transition diagram is allocated to one logic block. Moreover, a logic block useful for implementing both of the arithmetic/logic circuit and the control circuit is designed by using a multiple-valued current-mode logic circuit.

Original language	English
Title of host publication	2009 International SoC Design Conference, ISOCC 2009
Pages	278-281
Number of pages	4
DOIs	https://doi.org/10.1109/SOCDC.2009.5423802
Publication status	Published - 2009 Dec 1
Event	2009 International SoC Design Conference, ISOCC 2009 - Busan, Korea, Republic of Duration: 2009 Nov 22 → 2009 Nov 24

Publication series

Name	2009 International SoC Design Conference, ISOCC 2009

Other

Other	2009 International SoC Design Conference, ISOCC 2009
Country	Korea, Republic of
City	Busan
Period	09/11/22 → 09/11/24

Keywords

Direct allocation of a control/data flow graph
FPGA
Multiple-valued current-mode logic
Sequential logic circuit
Universal literal

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/SOCDC.2009.5423802

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Okada, N & Kameyama, M 2009, Design of a fine-grain reconfigurable VLSI based on logic-in-control architecture. in 2009 International SoC Design Conference, ISOCC 2009., 5423802, 2009 International SoC Design Conference, ISOCC 2009, pp. 278-281, 2009 International SoC Design Conference, ISOCC 2009, Busan, Korea, Republic of, 09/11/22. https://doi.org/10.1109/SOCDC.2009.5423802

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