A bitcounting operation, which counts l's/0's in input values and decides the output depending on their majority, is one of the important operations in binarized neural networks (BNNs). In this paper, we propose a bitcounting circuit for compact and low-power BNN hardware. This circuit performs the bitcounting operation by utilizing current-mode linear summation, which achieves a high-speed and low-power operation as well as a compact circuit. In order to guarantee a reliable analog operation of the circuit under possible process variation conditions, magnetic tunnel junction (MTJ) devices integrated with the bitcounting circuit can adjust its operating point and keep this adjustment information in a nonvolatile manner. Through an experimental-data-based evaluation of a 25-input bitcounting circuit under a 40-nm MOS/MTJ-hybrid process, we show that this circuit reduces the power-delay product and circuit area by 92% and 93%, respectively, compared to a conventional accumulation-tree-based one, while guaranteeing the correct operation under the process variation condition assumed on the target fabrication process technology.