Design of 30nm FinFETs and double gate MOSFETs with halo structure

Tetsuo Endoh, Koji Sakui, Yukio Yasuda

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

Design of the 30 nm FinFETs and Double Gate MOSFETs with the halo structure for suppressing the threshold voltage roll-off and improving the subthreshold swing at the same time is proposed for the first time. The performances of nano scale FinFETs and Double Gate MOSFETs with the halo structure are analyzed using a two-dimensional device simulator. The device characteristics, focusing especially on the threshold voltage and subthreshold slope, are investigated for the different gate length, body thickness, and halo impurity concentration. From the viewpoint of body potential control, it is made clear on how to design the halo structure to suppress the short channel effects and improve the subthreshold-slope. It is shown that by introducing the halo structure to FinFETs and Double Gate MOSFETs, nano-scale FinFETs and Double Gate MOSFETs achieve an improved S-factor and suppressed threshold voltage Vth roll-off simultaneously.

Original languageEnglish
Pages (from-to)534-539
Number of pages6
JournalIEICE Transactions on Electronics
VolumeE93-C
Issue number5
DOIs
Publication statusPublished - 2010 Jan 1

Keywords

  • FinFET
  • Halo I/I
  • MOSFET
  • S-factor
  • Threshold voltage roll-off

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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