Abstract
This paper proposes a construction of a general-purpose high speed correlator LSI, aiming at applications to various problems such as digital signal processing and synchronization word detection. A general method of constructing the rearrangement circuit as well as the generation of a high-speed detection pulse are presented. They are important in the construction of a high-speed synchronization word detector, one of the major applications of the high-speed digital correlator. It was shown by experiment that the high-speed digital correlator has the feature that the parameters can be set in a flexible way according to the problem, and can operate up to 200 MHz by the one-chip structure (two-parallel processing).
Original language | English |
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Pages (from-to) | 1-11 |
Number of pages | 11 |
Journal | Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi) |
Volume | 72 |
Issue number | 4 |
Publication status | Published - 1989 Apr |
ASJC Scopus subject areas
- Electrical and Electronic Engineering