Design and evaluation of a voltage-mode/current-mode hybrid logic circuit for a low-power fine-grain reconfigurable VLSI

Xu Bai; Michitaka Kameyama

doi:10.1109/ISOCC.2013.6864057

Design and evaluation of a voltage-mode/current-mode hybrid logic circuit for a low-power fine-grain reconfigurable VLSI

Xu Bai, Michitaka Kameyama

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper proposes a low-power two-variable logic circuit based on mixed voltage-mode/current-mode logic design. The voltage- and current-mode operations can be selected for low power consumption at low and high frequency, respectively, according to speed requirement. An nMOS pass transistor network is shared to realize voltage switching and current steering for the voltage- and current-mode operations, respectively, which leads to high utilization of the hardware resources. As a result, the power consumption of the hybrid two-variable logic circuit is lower than that of the conventional two-input look-up table (LUT) using CMOS transmission gates, when the operating frequency is more than 800 MHz. The delay and area of the hybrid two-variable logic circuit are increased by only 7% and 13%, respectively.

Original language	English
Title of host publication	ISOCC 2013 - 2013 International SoC Design Conference
Publisher	IEEE Computer Society
Pages	384-387
Number of pages	4
ISBN (Print)	9781479911417
DOIs	https://doi.org/10.1109/ISOCC.2013.6864057
Publication status	Published - 2013 Jan 1
Event	2013 International SoC Design Conference, ISOCC 2013 - Busan, Korea, Republic of Duration: 2013 Nov 17 → 2013 Nov 19

Publication series

Name	ISOCC 2013 - 2013 International SoC Design Conference

Other

Other	2013 International SoC Design Conference, ISOCC 2013
Country	Korea, Republic of
City	Busan
Period	13/11/17 → 13/11/19

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ISOCC.2013.6864057

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Design and evaluation of a voltage-mode/current-mode hybrid logic circuit for a low-power fine-grain reconfigurable VLSI. / Bai, Xu; Kameyama, Michitaka.

ISOCC 2013 - 2013 International SoC Design Conference. IEEE Computer Society, 2013. p. 384-387 6864057 (ISOCC 2013 - 2013 International SoC Design Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Bai, X & Kameyama, M 2013, Design and evaluation of a voltage-mode/current-mode hybrid logic circuit for a low-power fine-grain reconfigurable VLSI. in ISOCC 2013 - 2013 International SoC Design Conference., 6864057, ISOCC 2013 - 2013 International SoC Design Conference, IEEE Computer Society, pp. 384-387, 2013 International SoC Design Conference, ISOCC 2013, Busan, Korea, Republic of, 13/11/17. https://doi.org/10.1109/ISOCC.2013.6864057

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abstract = "This paper proposes a low-power two-variable logic circuit based on mixed voltage-mode/current-mode logic design. The voltage- and current-mode operations can be selected for low power consumption at low and high frequency, respectively, according to speed requirement. An nMOS pass transistor network is shared to realize voltage switching and current steering for the voltage- and current-mode operations, respectively, which leads to high utilization of the hardware resources. As a result, the power consumption of the hybrid two-variable logic circuit is lower than that of the conventional two-input look-up table (LUT) using CMOS transmission gates, when the operating frequency is more than 800 MHz. The delay and area of the hybrid two-variable logic circuit are increased by only 7% and 13%, respectively.",

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