Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic

T. Hanyu, A. Mochizuki, M. Kameyama

Research output: Contribution to journalArticle

11 Citations (Scopus)

Abstract

A design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage.

Original languageEnglish
Pages (from-to)331-366
Number of pages36
JournalIEE Proceedings: Circuits, Devices and Systems
Volume143
Issue number6
DOIs
Publication statusPublished - 1996 Jan 1

Keywords

  • Differential logic
  • Integrated circuits

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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