Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic

T. Hanyu; Akira Mochizuki; M. Kameyama

doi:10.1049/ip-cds:19960710

Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic

T. Hanyu, Akira Mochizuki, M. Kameyama

Research output: Contribution to journal › Article › peer-review

12 Citations (Scopus)

Abstract

A design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage.

Original language	English
Pages (from-to)	331-366
Number of pages	36
Journal	IEE Proceedings: Circuits, Devices and Systems
Volume	143
Issue number	6
DOIs	https://doi.org/10.1049/ip-cds:19960710
Publication status	Published - 1996 Jan 1

Keywords

Differential logic
Integrated circuits

ASJC Scopus subject areas

Electrical and Electronic Engineering

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@article{eb8929f3a8b24b7db4646479b075fd2f,

title = "Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic",

abstract = "A design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage.",

keywords = "Differential logic, Integrated circuits",

author = "T. Hanyu and Akira Mochizuki and M. Kameyama",

year = "1996",

month = jan,

day = "1",

doi = "10.1049/ip-cds:19960710",

language = "English",

volume = "143",

pages = "331--366",

journal = "IET Circuits, Devices and Systems",

issn = "1751-858X",

publisher = "Institution of Engineering and Technology",

number = "6",

}

TY - JOUR

T1 - Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic

AU - Hanyu, T.

AU - Mochizuki, Akira

AU - Kameyama, M.

PY - 1996/1/1

Y1 - 1996/1/1

N2 - A design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage.

AB - A design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage.

KW - Differential logic

KW - Integrated circuits

UR - http://www.scopus.com/inward/record.url?scp=0030392601&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030392601&partnerID=8YFLogxK

U2 - 10.1049/ip-cds:19960710

DO - 10.1049/ip-cds:19960710

M3 - Article

AN - SCOPUS:0030392601

VL - 143

SP - 331

EP - 366

JO - IET Circuits, Devices and Systems

JF - IET Circuits, Devices and Systems

SN - 1751-858X

IS - 6

ER -

Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic

Abstract

Keywords

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