Design and evaluation of a differential switching gate for low-voltage applications

Masanori Natsui, Kiyohiro Kashiuchi, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.

Original languageEnglish
Title of host publicationProceedings - 2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013
Pages146-151
Number of pages6
DOIs
Publication statusPublished - 2013
Event2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013 - Toyama, Japan
Duration: 2013 May 222013 May 24

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X

Other

Other2013 IEEE 43rd International Symposium on Multiple-Valued Logic, ISMVL 2013
Country/TerritoryJapan
CityToyama
Period13/5/2213/5/24

Keywords

  • bulk-drain connection
  • differential logic
  • low-voltage circuit
  • propagation delay

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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