Design and evaluation of a 4-valued universal-literal CAM for cellular logic image processing

Takahiro Hanyu, Manabu Arakaki, Michitaka Kameyama

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)

Abstract

This paper presents a 4-vaIued contentaddressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiplevalued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a highdensity 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.

Original languageEnglish
Pages (from-to)948-954
Number of pages7
JournalIEICE Transactions on Electronics
VolumeE80-C
Issue number7
Publication statusPublished - 1997 Jan 1

Keywords

  • Floating-gate mos transistor
  • Fully parallel template matching
  • Logic value conversion (LVC)
  • Single-transistor cell
  • Threshold operation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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