Delay evaluation of 90nm CMOS multi-context FPGA with shift-register-type temporal communication module for large-scale circuit emulation

Naoto Miyamoto, Tadahiro Ohmi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

For large-scale circuit emulation with using a multi-context FPGA (MC-FPGA), a circuit is divided into multiple sub-circuits, each sub-circuit is assigned to a context., and the MC-FPGA sequentially executes all the contexts one by one. So, the total execution delay is the sum of the delays of the contexts. It is, therefore, said that the total execution delay of the MC-FPGA increases proportional to the number of contexts used. However, in this paper, we show that the total execution delay remains constant if a shift-register-type temporal communication module (SR-TCM) is used instead of D-FlipFlop (D-FF) to implement sequential circuits. The SR-TCM is used not only for signal communication of sequential circuit like D-FF, but also for signal communication from preceding context to succeeding contexts. In order to quantify the delay, a MC-FPGA named Flexible Processor (FP), which contains the SR-TCM, have been designed and fabricated in 90nm CMOS process technology. From the measurement results, the total execution delay of the FP was kept constant regardless of the number of contexts used.

Original languageEnglish
Title of host publicationProceedings of the 2008 International Conference on Field-Programmable Technology, ICFPT 2008
Pages365-368
Number of pages4
DOIs
Publication statusPublished - 2008 Dec 1
Event2008 International Conference on Field-Programmable Technology, ICFPT 2008 - Taipei, Taiwan, Province of China
Duration: 2008 Dec 72008 Dec 10

Publication series

NameProceedings of the 2008 International Conference on Field-Programmable Technology, ICFPT 2008

Other

Other2008 International Conference on Field-Programmable Technology, ICFPT 2008
CountryTaiwan, Province of China
CityTaipei
Period08/12/708/12/10

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture

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