Current-source-sharing differential-pair circuits for a low-power fine-grain reconfigurable VLSI architecture

Xu Bai, Michitaka Kameyama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

A bit-serial reconfigurable VLSI using multiple-valued switch blocks and binary logic modules is proposed. In a cell, multiple-valued signaling is utilized to implement a compact switch block. Binary-controlled current steering technique is introduced utilizing a programmable series-gating differential-pair circuit to implement high-performance low-power arithmetic logic operations such as an arbitrary two-variable binary logic operation and a full-adder sum. Moreover, current-source sharing between a series-gating differential-pair circuit and a current-mode D-latch is proposed to reduce the current source count to reduce power consumption. As a result, the power consumption and the delay time of the proposed bit-serial cell are reduced to 63% and 72%, respectively, in comparison with those of a previous multiple-valued bit-serial cell.

Original languageEnglish
Title of host publicationProceedings - IEEE 42nd International Symposium on Multiple-Valued Logic, ISMVL 2012
Pages208-213
Number of pages6
DOIs
Publication statusPublished - 2012
Event42nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2012 - Victoria, BC, Canada
Duration: 2012 May 142012 May 16

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X

Other

Other42nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2012
Country/TerritoryCanada
CityVictoria, BC
Period12/5/1412/5/16

Keywords

  • binary-controlled series-gating circuit
  • bit-serial reconfigurable VLSI
  • current-source sharing technique

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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